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AD8362是一款真均方根响应功率检波器,测量范围为65 dB,主要用于各种高频通信系统和要求对信号功率精确响应的仪器仪表。它易于使用,仅需一个5 V单电源和几个电容便可工作。它可以在任意低频率至3.8 GHz以上频率范围工作,输入的均方根值可以为1 mV至1 V以上,具有较大的波峰因素,超过了精确测量CDMA信号的要求。
输入信号作用于一个梯形电阻衰减器,后者包括一个可变增益放大器(VGA)的输入级。利用专有技术平稳插入12个抽头点,能够使衰减器连续可变;衰减器由施加于VSET引脚的电压控制。所得信号作用于高性能宽带放大器,放大器的输出则由精密平方律检波器单元测量。然后对波动输出进行滤波,并将其与一个相同平方器的输出进行比较;平方器的输入为施加于VTGT引脚的固定直流电压,通常为VREF引脚上提供的1.25 V精确基准电压。
这些平方单元的输出差通过一个高增益误差放大器积分,在VOUT引脚上产生一个具有轨到轨能力的电压。在控制器模式下,这一低噪声输出可以用来改变主机系统RF放大器的增益,从而根据输入功率平衡设定点。或者,VSET上的电压可以与RF信号的振幅调制一模一样,在这种情况下,从整体来看,就可以去除检波和低通滤波之前的调制元件。在CLPF引脚添加一个外部电容后,便可无限降低均值滤波器的转折频率。
当用作功率测量器件时,VOUT与VSET搭接。这样,输出与输入的均方根值的对数成比例关系。换言之,将直接以dB显示读数,并可方便地按每10倍1 V或50 mV/dB的比例调整;其它斜率也很容易实现。在控制器模式下,由施加于VSET的电压确定消除偏离设定点量所需的输入功率水平。输出缓冲可以提供高负载电流。
在PWDN引脚上施加逻辑高电平时,AD8362进入省电模式,功耗为1.3 mW。在25°C时,它可以在大约20 μs内上电至标称工作电流20 mA。AD8362采用16引脚TSSOP封装,工作温度范围为−40°C至+85°C。
应用
功率放大器线性化/控制环路
发射机功率控制
发射机信号强度指示(TSSI)
RF仪器仪表
特性
完整的、经过全面校准的测量/控制系统
精确的均方根至直流转换(50 Hz至3.8 GHz)
输入动态范围大于65 dB:−52 dBm至+8 dBm (50 Ω)
与波形和调制无关,如GSM/CDMA/TDMA等
线性dB输出,调整比例:50 mV/dB
法则一致性误差:0.5 dB
所有功能均具有出色的温度和电源稳定性
工作电压:4.5 V至5.5 V (24 mA)
省电功能:1.3 mW
AD8362: 50 Hz to 3.8 GHz 65 dB TruPwr™ Detector
The AD8362 is a true rms-responding power detector that has a 65 dB measurement range. It is intended for use in a variety of high frequency communication systems and in instrumentation requiring an accurate response to signal power. It is easy to use, requiring only a single supply of 5 V and a few capacitors. It can operate from arbitrarily low frequencies to over 3.8 GHz and can accept inputs that have rms values from 1 mV to at least 1 V rms, with large crest factors, exceeding the requirements for accurate measurement of CDMA signals.
The input signal is applied to a resistive ladder attenuator that comprises the input stage of a variable gain amplifier (VGA). The 12 tap points are smoothly interpolated using a proprietary technique to provide a continuously variable attenuator, which is controlled by a voltage applied to the VSET pin. The resulting signal is applied to a high performance broadband amplifier. Its output is measured by an accurate square-law detector cell. The fluctuating output is then filtered and compared with the output of an identical squarer, whose input is a fixed dc voltage applied to the VTGT pin, usually the accurate reference of 1.25 V pro-vided at the VREF pin.
The difference in the outputs of these squaring cells is integrated in a high gain error amplifier, generating a voltage at the VOUT pin with rail-to-rail capabilities. In a controller mode, this low noise output can be used to vary the gain of a host system’s RF amplifier, thus balancing the setpoint against the input power. Optionally, the voltage at VSET can be a replica of the RF signal’s amplitude modulation, in which case the overall effect is to remove the modulation component prior to detection and low-pass filtering. The corner frequency of the averaging filter can be lowered without limit by adding an external capacitor at the CLPF pin. The AD8362 can be used to determine the true power of a high frequency signal having a complex low frequency modulation envelope, or simply as a low frequency rms volt-meter. The high-pass corner generated by its offset-nulling loop can be lowered by a capacitor added on the CHPF pin.
Used as a power measurement device, VOUT is strapped to VSET. The output is then proportional to the logarithm of the rms value of the input. In other words, the reading is presented directly in decibels and is conveniently scaled 1 V per decade, or 50 mV/dB; other slopes are easily arranged. In controller modes, the voltage applied to VSET determines the power level required at the input to null the deviation from the setpoint. The output buffer can provide high load currents.
The AD8362 has 1.3 mW power consumption when powered down by a logic high applied to the PWDN pin. It powers up within about 20 μs to its nominal operating current of 20 mA at 25°C. The AD8362 is supplied in a 16-lead TSSOP for operation over the temperature range of −40°C to +85°C.
Applications
Power amplifier linearization/control loops
Transmitter power controls
Transmitter signal strength indication (TSSI)
RF instrumentation
Features:
Complete fully calibrated measurement/control system
Accurate rms-to-dc conversion from 50 Hz to 3.8 GHz
Input dynamic range of >65 dB: −52 dBm to
+8 dBm in 50 Ω
Waveform and modulation independent, such as GSM/CDMA/TDMA
Linear-in-decibels output, scaled 50 mV/dB
Law conformance error of 0.5 dB
All functions temperature and supply stable
Operates from 4.5 V to 5.5 V at 24 mA
Power-down capability to 1.3 mW
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